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RFC 4842, "Synchronous Optical Network/Synchronous Digital Hierarchy (SONET/SDH) Circuit Emulation over Packet (CEP)", April 2007

Source of RFC: pwe3 (int)
See Also: RFC 4842w/ inline errata

Errata ID: 1066
Status: Verified
Type: Technical
Publication Format(s) : TEXT

Reported By: Alfred Hoenes
Date Reported: 2007-05-17

Section 11.2.3.2 says:

                     All 4 bits are used to indicate whether VC-11 (T1)    
   tributaries are carried within a TUG-2.  The first 3 bits read right
   to left are used to indicate whether VC-12 (E1) tributaries are
   carried within a TUG-2.  The first bit is used to indicate that a
   VC-2 is carried within a TUG-2.

It should say:

                     All 4 bits are used to indicate whether VC-11 (T1)
   tributaries are carried within a TUG-2.  The rightmost 3 bits are 
   used to indicate whether VC-12 (E1) tributaries are carried within a
   TUG-2.  The rightmost bit is used to indicate that a VC-2 is carried
   within a TUG-2.

Notes:

Replaced 'first 3 bits read from right to left' with '3 rightmost
bits' and similarly 'first 2 bits' with '2 rightmost bits'. The
new text avoids possible confusion with regards to the position
of the relevant bits.

from pending

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